View source for Exercise 2.5: DSL Error Protection

 
{{quiz-Header|Buchseite=Examples_of_Communication_Systems/Methods_to_Reduce_the_Bit_Error_Rate_in_DSL


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[[File:EN_Bei_A_2_5.png|right|frame|$\rm ADSL$ error protection]]


In order to decisively reduce the bit error rate of&nbsp; $\rm xDSL$ systems, various backup procedures have been proposed in the specifications to counteract the two most common causes of errors:
*Bit errors due to impulse and crosstalk interference on the (two-wire) line,
*clipping of signal peaks due to lack of dynamic range of the transmit amplifiers (''clipping'').


The diagram shows the error protection measures for $\rm ADSL/DMT$. These are implemented in two different paths:
*In the&nbsp; ''fast-path''&nbsp; one relies on lower waiting times.
*In the&nbsp; ''interleaved-Path''&nbsp; a lower bit error rate is expected.


The assignment of the bits to these paths is done by a multiplexer $\rm (MUX)$ with synchronization control.







Hint: 
*This exercise belongs to the chapter&nbsp; [[Examples_of_Communication_Systems/Methods_to_Reduce_the_Bit_Error_Rate_in_DSL|"Methods to Reduce the Bit Error Rate in DSL"]]. 






===Questions===
<quiz display=simple>

{Which statements are true for the two paths?
|type="[]"}
+ The&nbsp; ''interleaved-path''&nbsp; has greater latency.
- The&nbsp; ''fast-Path''&nbsp; is more susceptible to AWGN noise.
+ The&nbsp; ''fast-Path''&nbsp; is more susceptible to bundle errors.

{What are the tasks of the&nbsp; ''cyclic redundancy check''&nbsp; (CRC) and the&nbsp; ''Scrambler''?
|type="[]"}
+ CRC forms a parity-check value with $8$ bits from data blocks.
- The redundancy of the CRC is very high.
+ The scrambler should avoid long zero sequences and one sequences.
+ CRC and (de)scrambler are implemented with shift registers.



{Which statements are true regarding forward error correction?
|type="[]"}
- DSL/DMT uses convolutional coding.
+ DSL/DMT uses Reed-Solomon coding.
+ The coding is done on byte level.
- It is a symbol-wise coding.

{What are the tasks performed by&nbsp; ''interleaving''&nbsp; and&nbsp; ''de-interleaving''?
|type="[]"}
+ Improved correction capabilities for "Reed-Solomon".
+ Interleaver and de-interleaver work on byte level.
- Interleaving adds redundancy.
- Interleaving is particularly suitable for real-time applications.


{What are the tasks of the blocks&nbsp; ''"Tone Ordering"''&nbsp; and ''"Gain Scaling"''?
|type="[]"}
+ Measurement of the channel characteristics of each bin.
+ Allocation of the individual QAM signals to bins.
+ By&nbsp; ''tone ordering''&nbsp; one can further reduce the bit error rate.




</quiz>

===Solution===
{{ML-Kopf}}
'''(1)'''&nbsp; Correct are <u>statements 1 and 3</u>: 
*Due to the lack of an interleaver in the ''fast-path'', this path is less protected against bunching errors. 
*On the other hand, for AWGN noise, an interleaver does not reduce the bit error rate. 
*The disadvantage of an interleaver is the large waiting times (''latency''), since this distributes the input bits over a large time range in order to turn bundle errors into single errors after the de-interleaver, which is constructed in the same way, and which can then be removed by forward error correction (''FEC'').



'''(2)'''&nbsp; Correct <u>statements 1, 3, and 4</u>: 
*Both the [[Examples_of_Communication_Systems/Methods_to_Reduce_the_Bit_Error_Rate_in_DSL#Cyclic_redundancy_check|"CRC"]] (''Cyclic Redundancy Check'') as well as [[Examples_of_Communication_Systems/Methods_to_Reduce_the_Bit_Error_Rate_in_DSL#Scrambler_and_en.E2.80.93scrambler|"Scrambler/De-scrambler"]] are implemented with shift registers of length $8$ and $23$ respectively. 
*The ''scrambler'' is redundancy-free (that is, it has exactly as many output bits as input bits) and is self-synchronizing after a short run-in time. 
*The redundancy of CRC is very low. It is not error correction in the true sense, but rather control of particularly important data, such as that for frame synchronization.



'''(3)'''&nbsp; Correct <u> statements 2 and 3</u>:
*In the $\rm LNTww$&ndash;book "[[Channel_Coding]]", there is a detailed chapter on the[[Channel_Coding/Definition_and_Properties_of_Reed-Solomon_Codes|" Reed-Solomon Codes"]]. 
*These are byte-level block codes, i.e., not symbol-by-symbol coding.



'''(4)'''&nbsp; Correct are <u>statements 1 and 2</u> in contrast to the last two: 
*The [[Examples_of_Communication_Systems/Methods_to_Reduce_the_Bit_Error_Rate_in_DSL#Interleaving_and_en.E2.80.93interleaving|"Interleaving"]] is redundancy-free and results in large latency and delay, so it should be avoided for real-time applications.



'''(5)'''&nbsp; <u>All of the above statements</u> are correct, as can be read in detail on the [[Examples_of_Communication_Systems/Methods_to_Reduce_the_Bit_Error_Rate_in_DSL#Gain_scaling_and_tone_ordering|"Gain scaling and tone ordering"]] page.
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[[Category:Examples of Communication Systems: Exercises|^2.4 BER Lowering at DSL


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